Training Duration: 4 sessions
PLEASE NOTE: This is a LIVE INSTRUCTOR-LED training event delivered ONLINE.
It covers the same scope and content as a scheduled in-person class and delivers comparable learning outcomes. Daily sessions comprise 4-6 hours of class contact time.
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The Xilinx® Zynq® SoC provides a new level of system design capabilities. This course provides experienced system architects with the knowledge to effectively architect a Zynq system on a chip.
This course presents the features and benefits of the Zynq architecture for making decisions on architecting a Zynq SoC project. It covers the architecture of the Arm® Cortex®-A9 processor-based processing system (PS) and the integration of programmable logic (PL) at a sufficiently deep level that a system designer can successfully and effectively utilize the Zynq SoC.
The course also details the individual components that comprise the PS, I/O peripherals, timers and caching, as well as the DMA, interrupt and memory controllers. Emphasis will be placed on effective access and usage of the PS DDR controller from PL user logic, efficient PL-to-PS interfacing and design techniques, tradeoffs and advantages of implementing functions in the PS or the PL.
Engineers who need a deeper understanding of the Arm® Cortex®-A9 processor should attend Arm Cortex-A9 for Zynq System Design, which describes the principles and internal details of the Cortex®-A9 processor architecture itself, as opposed to the architecture of the Zynq processing system (PS) of which it is a part.