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August 2002|Press release
Celoxica Limited today announced that Doulos, Europe's leading high level design training and project services company has developed a new public training course, Handel-C for DK1 which will begin running shortly.
The course, Handel-C for DK1, runs over 4 days following an intensive application based programme. It is designed to quickly deliver all the Handel-C language, tool and methodology essentials for effective design, including the implementation of complex algorithms and the hardware acceleration of applications using FPGAs. The course uses development platforms featuring Xilinx Spartan-II FPGA or Altera APEX 20KE CPLD devices so that course delegates use DK1 as a rapid development platform by generating working hardware.
"With their Europe wide reputation for design methodology and language training Doulos were the obvious choice of professional training partner for Celoxica," said Dennis Nye, Senior Vice President, Worldwide Sales and Marketing Celoxica Limited. "With more and more companies adopting DK1, an intensive and formalised method for gaining hands-on experience with Handel-C and DK1 will give our customers the quickest route to the many benefits of using our tools, methods & libraries."
"Handel-C is a strong emerging technology for highly abstracted design, so we are pleased to be able to offer this new course in partnership with Celoxica" said Rob Hurley, Managing Director of Doulos. "Although design engineers with some experience of C or C++ programming can get up and running fast with Handel-C and DK1, the intensive course we have designed is the best way to get the most from the tool and method in a short space of time. Clearly, in-depth training like this will provide Celoxica customers the skills and background to effectively apply Handel-C and DK1 to their designs and fulfil the potential of reduced design time and increased design options as a result."
The DK1 design suite targets the design, validation, iterative refinement and implementation of complex algorithms in hardware. It includes built-in design entry, simulation, and synthesis - all driven by Handel-C, a design-entry language based on ANSI C that combines parallelism with a central timing model. Developers with knowledge of the C programming language find DK1's Handel-C language simple to use. With its intuitive hardware-specific constructs, Handel-C lets software developers quickly code hardware designs.
DK1's integrated Handel-C-to-gate-level synthesis and optimisation eliminates the need for any interim HDL stage or the need to maintain any additional code stream. The integrated Handel-C compiler lets developers generate optimised EDIF netlists appropriate for targeting FPGAs using FPGA manufacturers' tools. In addition, DK1 can optionally generate VHDL for traditional ASIC flows.
The first public course commences on the 3rd of September 2002 in Abingdon near Oxford, UK, but is available for team based delivery through Celoxica channels worldwide.
Doulos delivers essential design and verification know-how through training and project services in key technology areas covering system level design, hardware design and verification languages, and scripting languages. An independent company, the Doulos in-house expertise in leading edge methodologies enables clients to make informed choices and achieve the best from the available tools and technology. The ideal design know-how partner, Doulos is Europe's first choice for projects requiring the highest levels of technical expertise and design innovation.
Celoxica brings software methodologies to hardware design with tools that converge electronics design automation (EDA) and embedded software development (ESD) to improve designer productivity, address design skills shortages, and overcome system performance bottlenecks.
The company's design tools, and their supporting products and services, introduce three aspects of software development to the hardware design process: a C-based language for rapidly describing the functionality rather than the underlying structural detail of the hardware; an integrated development environment (IDE) for hardware design with features such as symbolic debugging as well as synthesis that correlates to software compilation in that it is very fast; and libraries of predefined functions including access to peripherals and processors in hardware via common APIs.
For further information, please contact:
Doulos: Rachael Mundy, Tel: +44 (0)1425 471223 firstname.lastname@example.org
Celoxica: Mark Carrington, +44 (0) 1235 825033 email@example.com
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