Global training solutions for engineers creating the world's electronics

Central Europe

Onsite and Customised Training
All Doulos courses can be delivered onsite and customised to meet your exact requirements. Doulos excels at tailoring course content, duration, EDA tool and technology contexts to maximise the value of training. If you have 3 or more engineers to train, please contact the Sales Team for further details. Tuition can be delivered in German or English.

Public Courses

Public courses for Central Europe are usually taught in English. However, depending on-demand can be delivered in German. They are scheduled regularly in Munich at venues within easy reach of the airport and public transport.
View course schedule at www.doulos.com/courses >>

Arm Approved Training Center (ATC)

An Arm Approved Training Center since 2002, Doulos has delivered Arm training to more than half of the world's top ten semiconductor companies, plus Arm customers in a range of application spaces. Doulos is the only Arm Approved Training Partner with a fully independent background in the EDA industry, and the only ATC in the SoC design and verification space with a full scope supporting training portfolio.

Uniquely, two streams of training cater for the specific needs of SoC Designers integrating Arm cores and Software Developers creating applications for Arm based systems.

Booking Enquiries

Please call +49 (0)511 1659 4160, email info.de@doulos.com or select „Make an enquiry" from the course description or course schedule pages.

Client List

Our Central European client base ranges from small businesses with one-off training reqirements, to multi-nationals requiring the development of complete training programmes. Infineon, Nokia, Siemens, Motorola, NXP, Philips, AMD and Micronas are just some of our Central European clients.

Upcoming Live Webinars

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Extending a Yocto BSP using Layers

Wednesday February 26 2025

1 hour session (All Time Zones)

We will investigate how the Yocto build environment provides the initial components to successfully boot a Linux system and how it can be modified to manage challenging requirements in your projects.

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Rapid Creation of Edge AI Solutions on an FPGA

Friday February 28 2025

1 hour session (All Time Zones)

This webinar will explore ideas on identifying and deploying trained AI models on FPGAs and look at contemporary software tools and APIs which help in putting together an FPGA-based Edge AI solution.

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Python in One Hour

Friday March 14 2025

1 hour session (All Time Zones)

Learn the basics of the Python language and what makes it different from other programming languages, as well as discover the richness of the Python libraries and add-on packages.

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Accelerating Formal Verification Using Non-Determinism

Wednesday March 26 2025

1 hour session (All Time Zones)

This webinar will explain what non-determinism is, how it's used, and show lots of examples so you can take advantage of non-determinism to accelerate the verification of your designs.

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A Guide to Productivity in Vivado using SystemVerilog

Friday March 28 2025

1 hour session (All Time Zones)

We will explore the features of SystemVerilog that are useful for RTL synthesis using the Vivado™ Design Suite from AMD, showing how the RTL SystemVerilog language constructs have been optimized for productivity and reliability.

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