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The Designer’s Guide to Verilog

The Verilog HDL is an IEEE standard hardware description language. It is widely used in the design of digital integrated circuits.

Here we provide some useful background information and a tutorial, which explains the basics of Verilog from a hardware designer's perspective. We also provide some useful tips and pointers to other Verilog information on the website.

Designing Hardware using Verilog

A tour of the features of Verilog that would be used in most projects. This is intended only as a brief introduction, and would not replace attendance of Comprehensive Verilog.

A Simple Design
Wires
Wire Assignments
A Design Hierarchy
Testbenches
Response Capture
RTL Verilog
If statement
Synthesizing Latches

Verilog Example Models

Analog-to-Digital Converter
Shift Register
Simple RAM Model
Universal Asynchronous Receiver (UAR)
8-bit x 8-bit Pipelined Multiplier

Doulos' Verilog FAQ

Verilog FAQ

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The Designer’s Guide to Verilog

Useful Verilog Tips

Design Tips

Verilog Backgrounder

Designing Hardware using Verilog

Verilog Example Models

Doulos' Verilog FAQ

KnowHowFree Technical Resources

Find a Training Course

The Designer’s Guide to Verilog

Useful Verilog Tips

Design Tips

Verilog Backgrounder

Designing Hardware using Verilog

Verilog Example Models

Doulos' Verilog FAQ

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