Day 1
Introduction to Arm
Cortex-M0+ Overview
Tools Overview for Arm Microcontrollers
Toolchain • Models • Debug & Trace • Development Boards
v6-M Programmer’s Model
Data types • Core registers • Modes • Exceptions • Instruction • Set Overview
CMSIS Overview
CMSIS-CORE • CMSIS-DSP • CMSIS-RTOS • CMSIS-SVD • CMSIS-DAP
v6-M Compiler Hints and Tips
Basic Compilation • Compiler Optimizations • Coding Considerations • Mixing C/C++ and Assembler • Local and Global Data issues
v6-M Memory Model
System Caches • Write Buffers • TCMs • Memory Types • Endianness • Address Map
Day 2
v6-M Exception Handling
Exception Model • Interrupts • Interrupt Handling • Prioritization and Control • Writing the Vector Table and Interrupt Handlers • Internal Interrupts and RTOS Support • Fault Exceptions
Embedded Software Development for Cortex-M Processors
Tailoring the C library to your target • Tailoring image memory map to your target • Reset and Initialization • Further memory map considerations • Building and debugging your image
Linker & Libraries Hints & Tips for Arm Architecture v6-M
Linking Basics • System and User Libraries • Veneers • Stack Issues • Linker Optimizations and Diagnostics • Arm Supplied Libraries • Scatter-loading
Cortex-M0+ Debug
Introduction to Debug • Debug Access Port (DAP) • Breakpoints/Watchpoints & Vector Catch • Cortex-M0+ Debug • System Control
Arm and Cortex-M0+ are registered trade marks of Arm Holdings Plc.
