Doulos delivers the best combination of HDL design flow, tool and technology training modules to enable you to optimize your Intel® FPGA based designs by:
- Reducing design time
- Improving your design quality
- Achieving performance goals
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Doulos' training credentials
Doulos has delivered Altera®-specific training since 1999, and FPGA-specific VHDL training since 1997. Our client support activities include Intel FPGA-specific (previously Altera) design projects,
and we work closely with
ALSE, a leading FPGA design house in France. Intel-based training can be delivered in English, French or German. Classes fully support today's FPGA devices, and the Intel Quartus® Prime FPGA tool flow, including dedicated labs.
Training programmes for Intel-based design
Language Training
- Comprehensive VHDL (5 days)
Comprehensive VHDL has been the industry's gold standard VHDL training class since 1991. It is quite simply the fastest, most effective way to get project-ready. You'll gain the expertise you need to write efficient, re-usable RTL code, and create test benches powerful enough to cope with complex designs.
Comprehensive VHDL comprises 2 modules:
- VHDL for FPGA Design (days 1-3)
Provides a solid foundation for Intel designers, especially those needing to apply the more advanced features of VHDL covered in the Advanced VHDL module. Covers the FPGA design flow with practical, hands-on exercises throughout, and delegates leave with a flexible project infra-structure to use, adapt and extend on projects after the class. Workshops include dedicated labs illustrating the use of Quartus Prime in the FPGA tool flow.
- Advanced VHDL (days 4-5)
Pre-requisite training for engineers targeting large FPGAs, such as Stratix® IV. Focuses on testbenches to cope with more complex designs, and design for re-use.
View the full Comprehensive VHDL course description and dates »
- Expert VHDL (5 days)
Expert VHDL has become essential training for engineers working on large or complex designs. Without it, efficiency and productivity can suffer, causing time-to-market and development costs to increase.
Expert VHDL is presented in two modules.
- Expert VHDL Design (days 1-2) teaches you to write better, more efficient code that is easier to maintain and re-use.
- Expert VHDL Verification (days 3-5) shows you how to speed up and improve design verification; make testbench writing easier and more effective for even the most complex testbenches, and create behavioural models to make tests run faster.
View the full Expert VHDL course description and dates »
Intel FPGA Device Training
- Designing with Intel Quartus Prime - Enhanced syllabus
Designing with Intel Quartus Prime delivers all the techniques and know-how you need to use Quartus more effectively to create successful designs. Learn how to avoid common design problems, save time, boost efficiency and get the chance to learn extra tips and insights from an experienced designer and expert tutor.
View the Designing with Intel Quartus Prime course description and dates »
- Embedded Design for Intel SoC FPGAs
The latest Intel SoC FPGAs (Altera Cyclone® V & Arria® V), with their Embedded Processing System using ARM® Cortex®-A9 MPCores represent a significant evolution for Intel devices. To help you understand the design challenges and maximise the potential of these SoC FPGAs, this modular four day training course, covers the essential concepts and tools usage to help you start a new application in confidence, as well as provide lots of practical examples that you can use as a basis within your environment.
View the Embedded Design for Intel SoC FPGAs course description and dates »
- Intel - ARM SoC FPGA design
This course is intended for hardware and software engineers providing guidance on implementing an Intel SoC with the ARM Cortex-A9 hard processing system (HPS).
View the Intel - ARM SoC FPGA course description and dates »
- Altera Nios II SoPC
Altera Nios II SoPC is a mission critical 3-day class for hardware and software engineers. Attend with your colleagues and you'll learn to create convergent design flows, develop efficient architectures and avoid the traditional headaches and time-wasters associated with SoPC design.
View the Altera Nios II SoPC course description and dates »
Team-based and in-house training
Doulos excels at tailoring class content, duration, EDA tool and technology contexts to maximize the value of training. If you have more than 3 engineers to train, please ask Doulos about our cost effective small team pricing. If you have 5 or more engineers that require training, speak to the
sales team about in-house training options.
