Global training solutions for engineers creating the world's electronics
1 hour session (All Time Zones)
Presenter: John Aynsley
Time: 10-11am (BST) 11-12pm (CEST) 2.30-3.30pm (IST)
Time: 10-11am (PDT) 11-12pm (MDT) 12-1pm (CDT) 1-2pm (EDT)
Formal proofs of end-to-end properties can be a very valuable contribution to RTL sign-off and yet are often the most difficult to achieve.
In this webinar Doulos Co-Founder and Technical Fellow, John Aynsley will explore some practical ways of dealing with inconclusive formal proofs when using Synopsys® VC Formal™. This includes the use of complexity analysis and bounded reachability analysis, overconstraining the design, setting cut points, and creating abstractions.
This webinar will be useful to anyone who wants to learn to make more effective use of formal.
Webinar topics include:
- Formal Verification Overview
- Formal Apps
- Formal Coverage
- Assertion Coverage
- Inconclusive Formal Proofs
- Cut Points and Abstraction
Attendance is FREE and live Q&A will be provided throughout the broadcast.
John Aynsley - Doulos Co-Founder and Technical Fellow will present this training webinar, which will consist of a one-hour presentation with interactive Q&A available to attendees throughout.
Attendance is free of charge
If you have any queries, please contact webinars@doulos.com
Visit www.doulos.com/knowhow
Please contact Doulos to schedule a public course to suit you, or to discuss onsite training.
