Introduction to Arm Architecture
Architecture versions • Registers and instruction sets • Exception model • Memory model • Coprocessors • Architecture extensions • Pipelines
Arm tools overview
Arm RealView Developer Suite • Tool Licensing • GNU and ABI • Debug Interfaces
Introduction to Arm assembler programming
Load/Store Instructions • Data Processing Instructions • Flow Control • Miscellaneous • DSP
Exception Handling
Exceptions overview • Interrupts sources and priorities • Abort Handlers • SVC Handlers • Undef Handlers • Reset Handlers
Arm Caches and TCMs
Cache basics • Caches on Arm processors • Tightly Coupled Memory (TCM) • Optimization consideration
Memory Management
Memory Management Introduction • Access Permissions and Types • Memory Protection Unit (MPU) • Memory Management Unit (MMU) • Optimizations & Issues
Synchronization
Why do we need synchronization? • Synchonization primitives • SWP instruction • LDREX and STREX instructions
Software Engineer's Guide to Cortex-A5
Overview • Level 1 memory system
Software Engineer's Guide to MPCore Processors
MPCore Features • Snoop Control Unit • Accelerator Coherency Port (ACP) • Interrupt Controller • Timer and watchdog • TrustZone Support • Developing for Arm MPCore Processors • Booting SMP • Configuring an interrupt • Synchronization
NEON Overview
NEON Instruction Set Overview • NEON Software Support
Power Management for Cortex-A/R Cores
Processor Power Consumption • Power Modes • NEON and MPCore
C/C++ Compiler Hints & Tips
Basic Compilation • Compiler Optimizations • Coding Considerations • Local and Global Data issues
Linker & Libraries Hints & Tips
Linking Basics • System and User Libraries • Veneers and Interworking • Linker Optimizations and Diagnostics • Arm Supplied Libraries
Further Compiling/Linking Hints & Tips
Mixing C/C++ and Assembler • Stack Issues • VFP/NEON • Advanced Building Facilities • Embedded Software Development
Embedded Software Development
An "Out-of-the-box" build • Tailoring the C library to your target • Tailoring image memory map to your target • Reset and Initialization • Further memory map considerations • Building and debugging your image
Arm Debug and Trace
Debug Logic Overview • Debug Logic Features • Tools use of Debug Logic • Trace Logic Overview • Debug vs. Trace • System Level Debug Infrastructure • CoreSight Introduction • CoreSight Debug • CoreSight Trace
Introduction to TrustZone
Exception Handling • Memory System • Debug • Software
