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Arm Cortex-M33 Software Design

Standard Level - 4 days

This course is available Live Online worldwide: View the Live Online full course description »

This course is designed for engineers developing software for platforms based around the Arm® Cortex®-M33 processor. The course includes an introduction to the Arm product range and supporting IP, the Cortex-M33 core, programmers' model, TrustZone-M security features, instruction set and debug architecture. The course includes a number of hands-on practical exercises covering both assembly and C programming to reinforce the lecture material.

This course is designed for software engineers writing application and system software for platforms using the Cortex-M33 processor.

  • Some basic C programming knowledge
  • Experience of assembler programming is not required but would be beneficial
  • Some knowledge of embedded systems
  • A basic awareness of Arm is useful but not essential

This class uses training materials developed by Arm®

Day 1

  • Introduction to Arm
  • Cortex-M33 Overview
    • Architectural Features • Register View • Modes of Execution • System Interfaces • Memory Map • Exceptions • Security Attribution • Power Management • Floating Point Unit • Debug Features
  • Armv8-M Mainline Programmers’ Model
    • Introduction • Data Types • Core Registers • Modes, privilege and stacks • Exceptions • Instruction Set Overview
  • Tools Overview for Arm Microcontrollers
    • Arm Compilation Tools • Keil MDK • DS-5 Arm • Fast Models
  • Cortex-M33 Processor Core
    • Teal Pipeline block diagram/Overview • Fetch, Decode/Execute, Complex Execute, Floating Point Stages • Unaligned access penalties
  • CMSIS Overview
    • Introduction • CMSIS-Core • CMSIS-DSP • CMSIS-Driver • CMSIS-RTOS • CMSIS-SVD • CMSIS-Pack • CMSIS-DAP

 

Day 2

  • Armv8-M Mainline Assembly Programming
    • Introduction • Data Processing Instructions • Load/Store Instructions • Flow Control • Miscellaneous
  • Armv8-M Mainline Exception Handling
    • Introduction • Exception Model • Exception Entry and Exit Behavior • Prioritization and Control • Interrupt Sensitivity • Writing the Vector Table and Interrupt Handlers • Internal Exceptions and RTOS Support • Fault Exceptions
  • Armv8-M Memory Protection
    • Memory Map • Memory Regions • Memory Attributes • MPU Programmer's model • Configuring the MPU • Memory Management Faults

 

Day 3

  • Armv8-M Synchronization
    • Introduction to synchronization and semaphores • Exclusive accesses • Memory ordering
  • Armv8-M Mainline Compiler Hints and Tips
    • Compiler Support for Armv8-M • Language and Procedure Call Standards • Compiler Optimizations • Coding Considerations • Mixing C/C++ and Assembler • Local and Global Data issues
  • Armv8-M Mainline Linker Hints and Tips
    • Linking Basics • System and User Libraries • Veneers • Stack Issues • Linker Optimizations and Diagnostics • Arm Supplied Libraries
  • Armv8-M Embedded Software Development
    • Default compilation tool behavior • System startup • CMSIS-CORE startup and system initialization code • C library initialization • Tailoring the image memory map to a device • Scatter-loading • Linker placement rules • Stack and heap management • Further memory map considerations • Post startup initialization • Tailoring the C library to a device • Building and debugging an image

 

Day 4

  • Armv8-M Debug
    • Introduction to Debug • Debug Modes and Security • Debug Events and Reset • Flash Patch and Breakpoint Unit – FPB • Data Watchpoint and Trace Unit – DWT • Instrumentation Trace Macrocell – ITM • Micro Trace Buffer – MTB (optional) • Embedded Trace Macrocell – ETMv4.2 (optional) • Trace Port Interface Unit – TPIU (if ETM is implemented)
  • Armv8-M DSP Extension
    • Extensions Overview • DSP Extension
  • Armv8-M Floating-point Extension
    • Floating-point Extension overview • Registers • Enabling the FPU • Floating-point instructions • Exceptions
  • Armv8-M Security Extension
    • Overview • Memory Configuration • Function Calls & Toolchain Support • Exceptions

Arm and Cortex, are registered trade marks of Arm Holdings Plc.

The tool-chain required for the exercises are provided within a self-contained virtual machine. The student is only required to install the VirtualBox software on her/his Windows/Linux/Mac host machine. The remaining tools and exercises files are pre-configured and located inside the Virtual Machine to be run locally. The VM can be used for day do day embedded software development and allows the student to continue or redo his exercises even after the course has ended.

The exercises are designed to run on the provided NUCLEO STM32L552 board. This board is kept by the student at the end of the class.

The exercises cover a large spectrum of topics amongst those:

  • Assembly programming
  • Exception handling with the implementation priority schemes and pre-emption
  • Mixing C and assembly to provide a semi-hosted solution
  • Creating linker scripts

 The security related hands-on exercises are:

  • Part 1: Tool Flow
  • Part 2: Security Attribution Unit Configuration
  • Part 3: Configuring the non-secure world
  • Part 4: Transition to the non-secure world
  • Part 5: Using Arm cmse attributes for non-secure calls
  • Part 6: Using Arm cmse attributes for secure calls
  • Part 7: Identifying the source of a function call
  • Part 8: Checking a data array address range
  • Part 9: Accessing secure data from a non-secure application
  • Part 10: Illegal access to a secure function from the non-secure word

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