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Arm Cortex-R4 Software Design is a 4-day comprehensive class that introduces the Arm® Cortex®-R4 architecture and the Arm development systems.
Software engineers designing applications for platforms based around the Arm Cortex-R4 processor Core.
Delegates should have a basic understanding of microprocessor systems and be familiar with assembler or C programming. A basic awareness of Arm and experience of embedded system development is helpful, but not essential.
This class uses training materials developed by Arm®
Architecture versions • Registers and instruction sets • Exception model • Memory model • Coprocessors • Architecture extensions
Arm DS-5 • Tool Licensing • GNU and ABI • Debug Interfaces
Load/Store Instructions • Data Processing Instructions • Flow Control • Miscellaneous • DSP
Exceptions overview • Interrupts sources and priorities • Abort Handlers • SVC Handlers • Undef Handlers • Reset Handlers
Cache basics • Caches on Arm processors • Tightly Coupled Memory (TCM) • Optimization consideration
Memory Management Introduction • Access Permissions and Types • Memory Protection Unit (MPU) • Optimizations & Issues
Atomicity • LDREX/STREX Uses • Mutex Implementation
Data barriers • Instruction barriers
Introduction • L1 memory system
Processor Power Consumption • Power Modes • NEON and MPCore
Basic Compilation • Compiler Optimizations • Coding Considerations • Local and Global Data issues
Linking Basics • System and User Libraries • Veneers and Interworking • Linker Optimizations and Diagnostics • Arm Supplied Libraries
Mixing C/C++ and Assembler • Stack Issues • VFP/NEON • Advanced Building Facilities
An "Out-of-the-box" build • Tailoring the C library to your target • Tailoring image memory map to your target • Reset and Initialization • Further memory map considerations • Building and debugging your image
Invasive Debug • Non-Invasive Debug • PMU • Trace
Distributor and CPU Interfaces • How to enable and configure interrupts • How to handle interrupts • How to send software interrupts • Security Extensions
The learning is reinforced with unique Lab exercises using the QEMU virtual platform and covering assembly programming and bringing a complete bare metal system to life. Lab exercises for assembly programming cover the concepts of data transfer, data processing, flow control and DSP instructions, and rely on a combination of GNU compilation tools, GDB and an instruction set simulator used for fast prototyping. Additional exercises show the main steps involved in bringing a bare metal system to life, including the configuration of the various mode stacks and the creation of an interrupt handler. These exercises make use of the assembler and linker as well as the interactive debugger (GDB/DDD and QEMU).
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